The lower layer of communication networks like the connectivity layer in a core network of a cellular environment could be seen as a layer of distributed resources for managing data flows. Switches and multiplexers are some of the main components for this purpose. In complex communication networks managing data of different formats and varying data rates, it is of great importance that the construction of the components are flexible without being too complex.
Conventionally, the switches comprise a number of serial inputs and outputs. The data stream of one input may be directed in its entirety to a certain output line, or it may consist of a mixture of time division multiplexed data frames that are to be distributed to several outputs. The different lines may be running various interfaces e.g. E1, E2, E3 and STM-1 (FIG. 1). Additionally, the data speed of each input line may vary in a wide range. The transition of data frames in the switches is often executed by means of time slot buses located on the back plane of the switches.
A variant of such a switch is illustrated in FIG. 2. In this example switch, there are up to 32 serial input lines and 32 serial output lines. The possible data speed of each line should vary from 8 kbit/s up to 45 Mbit/s. The transmission of data is executed on one or more fast TDM buses, transporting the data frames on time slots preferably with a minimum delay.
A problem occurring in switches handling various line interfaces is that each line will need a memory for temporary storage of frames before and after the TDM buses. The higher data rate on each line, the higher the requirement for the storage capacity.
A synchronous digital TDM switch as described in [1] typically needs to store more than two frames of data on each line and in both directions (RX and TX). If such a digital switch shall be a general switch dimensioned for any data rates on any lines (i.e. from 64 kbit/s and up to 45 Mbit/s), a large amount of memory could be necessary unless some restrictions on how the memory access and allocation are established.
The straight forward way to transfer data coming from several data lines over a TDM bus is to allocate memory according to the maximum speed allowed on each line. If the maximum speed on each line is N bytes/frame, and the number of lines are L, then the required amount of memory needed is at least 4×N×L bytes (need to store at least 4 frames of data).
U.S. Pat. No. 6,052,448 uses a method for reducing the amount of needed memory, but this is not done by dynamically allocation of the memory. If the maximum allowed transmission rate for each line is high, a large amount of memory is needed. Delays through the node will probably also be too high, often more than two TDM frames (250 us).